Control of a vehicle along a path divided into a plurality of signal blocks

ABSTRACT

A train control signalling system is provided for train speed command signals and train position detection signals, which system is operative in a fail-safe manner with a plurality of isolated track circuit blocks. For a given train system, a plurality of wayside stations is provided, with each station being operative through a limited number of conductors to energize a predetermined number of track circuit blocks. Each station includes a crystal controlled signal generator to assure an accurate coherent base frequency control of the communicated signals and provide control signals for the signal communication operation relative to each station to thereby control, in effect as an extension of the crystal control concept, accuracy to each of the associated track circuit blocks. Up to 32 separated track circuit block locations receive information from each wayside station, for this particular system as described, over a common time division multiplexed signalling system, so it is necessary that each location receive its particular information only at the correct time period. This is accomplished by an appropriate control signal sent for this purpose to each track circuit block location.

O United States Patent 113,593,022

I72] Inventors Robert C. Hoyler 3,303,470 2/1967 Brixner et al 340/163Pittsburgh;

Primary Izmmmer-Drayton E. Hoffman 35:: 22 Murryume' AssistantExaminer-George H1 Libman 0 pp No 762.563 Attorneys F. H Henson, R. G.Brodahl and M. F. Oglo {22] Filed Sept. 25,1968 [45] Patented July 13,1971 [73] A599 mm Corponuo ABSTRACT: A train control signalling systemis provided for train speed command signals and train position detectionsignals, which system is operative in a fail-safe manner with a [54]CONTROL OF A VEHICLE ALONG AIM-"l plurality ofl isriillatedftrackslrcuitblocks. For adgiver;I train DWIDED INTO A PLURALn-Y 0F SIGNAL system, aur my 0 ways] e stations 18 provide W1 each m OCKS station beingoperative hrough adllmitedbzumiier ofkconducwi tors to energize a preetermine num r o trac circutt Cum on Figs blocks. Each station includesa crystal controlled signal Cl 246/34 generator to assure an accuratecoherent base frequency con- 246/5 340/ trol of the communicated signalsand provide control signals [Ill- Cl 561! 23/14 for the signalcommunication operation relative to each sta- FHII selldl 340/35 tion tothereby control, in effect as an extension of the crystal 246/5- 8control concept, accuracy to each of the associated track cir- 56 Ref CMcuit blocks. l l Up to 32 separated track circuit block locationsreceive in- UNITED STATES PATENTS formation from each wayside station,for this particular system 3,263,217 7/1966 803111311 340/163 asdescribed, over a common time division multiplexed 3,021,506 2/1962l-laner et al. 340/163 X signalling system, so it is necessary that eachlocation receive 3,072,785 1/1963 Hailes........ 246/ I87 UX itsparticular information only at the correct time period. This 3,250,9145/1966 Reich 246/63 X is accomplished by an appropriate control signalsent for this 3,252,138 5/1966 Young 340/151 X purpose to each trackcircuit block location.

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CONTROL OF A VEHICLE ALONG A PATH DIVIDED INTO A PLURALITY OF SIGNALBLOCKS BACKGROUND OF THE INVENTION This invention relates to control ofavehicle along a path divided into a plurality of signal blocks. lncertain broader aspects it relates to multiplex system of utility in anysituation where dangerous failure modes must be avoided. It alsogenerally relates to telecontrol of vehicle operation.

A train control system must fully meet the safety standards historicalin the rapid transit and railroad industry. ln addition, a centralizedtraffic control system is desired which is suitable for a high degree ofautomation far above the level of service commonly provided today and inaddition the cost of this system has to be reasonable.

In the past systems, for train control signalling purposes, in sulatedjoints have been required between the respective track circuit blocks.Another provision of the prior art control systems have been to utilizesignal frequency separation between respective track circuit blocks andto provide some means to separate the respective frequency signalenergization of the so-provided discrete track circuit blocks.

SUMMARY OF THE lNVENTION In accordance with the present invention atrain control signalling svstem is provided for the transmission ofspeed command signals from separate wayside stations to each of anassociated group of isolated track circuit blocks, and for thetransmission of train position detection signals back from those trackcircuit blocks to the wayside station associated with a given group ofsaid track circuit blocks. A time division multiplexing of these signalsis provided in conjunction with limited number of conductors betweeneach wayside station and a central control station. All coded speedcommand signals and train position detection signals change at the sametime to increase the system synchronism or continuity. For controllingtrain movement in close proximity and within 100 feet or so of eachpassenger station, which can also be a wayside station, direct wiring ofsignals is provided, and for greater distances from each station thecontrol signals are multiplexed to each track circuit block.

For each wayside station, up to 32 track circuit blocks are controlledin the illustrative example herein given, but is should be understoodthat 64 or 128 or other multiples of these values could be readilyaccommodated, by simple modification of the apparatus, if desired. Eachcontrol signal has six respectively reverse phased bits of informationand is operative with three different signal frequencies such that 18bits per second of information is sent to each of up to 32 track circuitblocks, with the 32nd bit position being used for synchronization andreset purposes. The train control information is supplied at the rate of576 bits per second to the signalling system. A ZERO bit signal has avoltage of zero volts and a ONE bit signal has a voltage of 12 volts.The coded speed command signals and the coded position detection signalsare induced to flow in the track rails, which have a generallyundesirable signal-to-noise characteristic such that crystal-controlledsignalling is desirable. A 311.04-kilocycle/sec. crystal oscillatorsignal is provided by a suitable oscillator at each wayside station, andthis signal is divided by 540 to provide a 576-cycle/sec. multiplex bitsignal; the latter signal is further divided by the number of availabletrack circuit blocks 32 to yield an l8-cycle/sec. multiplex word signal.These three signals are then combined to be sent on onecon' ductor asfollows: the l8-cycle/sec. word signal is subtracted from the576-cycle/sec. bit signal, and the 311.04-kilocycle/sec. oscillatorsignal is added to the result to provide an operation control signal.

For the purpose of providing an example, the following comma-free codedspeed command signals are illustrative of those that can be utilizedwith the present train control signalling system:

l01111 m.p.h 101001-18 m.p.h. 100111-70 m.p.h 100000-12 m.p.h. 100011-$0m.p.h 100001-6 n1 p.h. 1010l1l*0 m.p.h 101000-0 m p h 10010127 m.p.h

In the course of the actual signal transmission reverse phasing ofsuccessive signal bits permits sensing aboard the train a bit rate toassist in decoding the train speed command signals.

The vehicle communication signals, such as vehicle speed command signalsand vehicle presence detection signals, pass through a pair ofconductors which can be the track rails if desired and which conductorsare periodically short circuited by a low impedance conductor connectedbetween those conductors to provide discrete signal blocks, and whichare operative relative to the vehicle such that the vehicle as it movesalong the support track member is effective to short circuit or providea low impedance path between these two signal conductors for the purposeof notifying the attendant control system of the actual position of thevehicle as it moves along the support structure.

It is contemplated in accordance with die present invention that bothfrequency and modulation phase separation will be applicable inreference to contiguous track circuit signal blocks. More specifically aplurality of three signal frequencies is provided to the signal blocksand in addition each frequency includes a six-bit command signal withthe provision that between the adjacent signal blocks a phase shifttakes place such that through the combination of three frequencies andsix phase shifts it is possible to provide signal communication to 18track circuit blocks before it is necessary to repeat the signalcharacteristics.

In general, any given particular track circuit block receives the samefrequency and phase shift speed command signal all the time. For examplea particular track circuit block will receive signal frequency F-l,phase shift three and its associated receiver will be tuned to receive asignal at F-! frequency and will feed back the phase-three frequency tothe provided speed signal comparison circuit for comparison with thetransmitted phase three-speed command signal occurring at anl8-cycle/sec. rate. The neighboring track circuit blocks are suppliedwith a different frequency and a different phase shifted speed commandsignal arrangement such that for a combination of three signalfrequencies and six phase shift arrangements [8 unique combinations ofspeed command signal can be provided to thereby permit a separationbetween identical signal transmission relative to the track circuitblocks of 18 track circuit blocks. Thusly, for the track circuit signalblocks operative with a given wayside multiplex station, the first trackcircuit signal block and the 19th could be energized with signalfrequency F-l, phase one, the second and the 20th signals blocks couldbe energized by signal frequency F-Z, phase one, the third and the 21stsignal blocks could be energized with signal frequency F-3, phase one,the fourth and the 22nd signal blocks could be energized by F-l, phasetwo and so forth. This has been decided as a desired way to transmit thesignals in a reliable and fail-safe manner to the track circuit signalblocks. This provides the desired number of isolated orthogonal trainvehicle speed control and position sensing channels, which channels arerepeated only at separation distances large enough to assure fail-safevehicle control and position sensing through adequate signal attenuationbetween two otherwise similar control signals for the purpose ofavoiding erroneous vehicle control and position-sensing informationbeing received even under fault conditions, the number of differentsignal frequencies can by reduced to a small number such as three withthe desired orthogonality between adjacent signal block channelsoperating at the same frequency being separated by orthogonal signalcoding of the modulation impressed upon the transmission carrier. Forthis purpose comma-free coded vehicle command signals are utilized, andare phase-shifted relative to adjacent signal channels, to effect inthis manner three signal frequencies and six phase shifts to provideadequate separation of the respective signal block channels.

The train vehicle carries a command signal receiver that senses thetransmitted bits of the command signal in groups of six such bits, suchthat the entire vehicle command signal is thereby sensed and causes thevehicle to follow the desired speed of movement along the track. By theuse of a wayside control station operative with up to 32 track circuitblocks the wayside control unit can monitor the movement of a vehiclemoving in either a first direction along the track or the oppositedirection along that same track, by sensing the effect of the trainvehicle to short circuit and thereby remove the dc tection of theprovided vehicle speed command signal relative to a particular trackcircuit signal block within which the vehicle is positioned in relationto the position-detecting signal receiver and its operation. A singlecentral digital computer can be provided for an entire train controlsystem and be operative with the required plurality of wayside controlstations, with each said wayside control station operating entirely byitself to provide a programmed vehicle movement through the up to 32track circuit blocks controlled by that wayside station control unit,and cooperative with the central computer in regard to changing thispredetermined vehicle movement pattern when the vehicle is within theparticular group of track circuit signal blocks operative with any givenwayside station control unit. In other words, the wayside stationcontrol provides vehicle speed command signals to each of its trackcircuit blocks in accordance with a predetermined vehicle movementpattern when traveling through that group of track circuit blocks, andin the event of a need to reduce the travel speed ofa given vehicle forthe reason that several vehicles are tied up ahead of the vehicle or forthe reason that a construction program is underway somewhere along theproposed travel path of that vehicle, then the central computer canoverride and reduce the movement speed of the train vehicle when passingthrough that particular group of track circuits or when passing throughany one or more track circuits within that group of track circuits.Thusly each wayside station control unit operates as a signal multiplexcenter relative to its particular group of up to 32 track circuitblocks, and it has its own crystal oscillator and signal operation inaccordance with the present invention. The central computer operateswith as many of these wayside station multiplex control units as arenecessary to provide the desired number of track circuit blocks for theentire system, and can be operative to change the predetermined speedcommand signal pattern provided by any wayside station multiplex control unit in response to happenings within a different wayside stationterritory. Additional data transmission equipment is provided tointerface one group oftrack circuit blocks and the associated waysidestation multiplex control unit with the next adjacent group of trackcircuit signal blocks and their associated wayside station multiplexcontrol unit. Each of these groups of track circuit signal blocks is notcorrelated with the other groups of track circuit signal blocks, howevertheir frequencies are chosen in advance and are generally correlatedthrough inherent operation of the crystal oscillator control. Inaddition the signal multiplex control system of the present inventioncan be operated as one small group of track circuit signal blocks withinanother unrelated type of control system and receive an overridingvehicle speed command pattern to change its own predetermined speedcommand pattern if desired. It would be desirable to have certaininformation from adjacent control systems to correlate the operation ofthe signal multiplex system in accordance with the present in vention.The central computer can provide more restrictive running where desired,however, it cannot cause any given group of track circuit signal blocksto provide a greater vehicle speed pattern than is in accordance withthe predetermined and scheduled speed pattern for that group oftrackcircuit blocks. Thusly the maximum speed limits are provided by eachmultiplex control system in accordance with the present invention,unless the central control unit overrides and restricts to reduce thevehicle speed through any group of track circuit signal blocks or one ormore track circuit signal blocks within any group of track circuitsignal blocks. The local wayside control unit has preset into itsscheduling the maximum and desired vehicle travel speed through each ofits associated track circuit signal blocks. If a given wayside controlunit senses the occupancy ofone ofits track circuit blocks ahead ofwhere a particular train vehicle is located, then the wayside conti .ilcan provide a suitable control signal, such as a zero speed commandsignal, to the train in adequate time to reduce the speed of theparticular controlled train vehicle to prevent a collision by apredetermined safe distance margin. If the track circuit blocks ahead ofa given vehicle are not occu pied, and no restrictive speed pattern isprovided by the cen tral computer, then the wayside control stationprovides speed command signals to the train vehicle to cause it to movethrough each particular track circuit block at the desired op timumtravel speed. The wayside control unit is a station multiplex center.The provision of the multiplex system adds flexibility to the controlsystem because it is so readily changeable in relation to trackoccupancy ahead of a particular train vehicle, and further so changeablerelative to construction efforts along the track, the sensing of alandslide which would cause an obstruction to the train vehicle at alocation ahead of its movement, and things of this type.

BRIEF DESCRIPTION OF THE DRAWINGS In FIG. I there is shown a prior artinformation transmission arrangement for sending train control signalsthrough in dividual conductors directly to selected track circuitblocks.

In FIG. 2 there is generally shown the improved signal transmissionarrangement ofthe present invention.

In FIG. 3 there is shown the signal conductor arrangement for sendingthe multiplexed control signals between a wayside station and individualtrack circuit blocks.

In FIG. 4 there is illustrated the general signal transmissionarrangement of a wayside station operative with a plurality of trackcircuit signal blocks.

In FIG 5 there is shown the information signal waveform sent down thecontrol conductor between a wayside station and the individual trackcircuit blocks.

In FIGv 6, including curves 6A, 6B, 6C, 6D and 6E, there is illustratedone circuit arrangement utilized and its function to provide the desiredtime slot control signal and infornption down signal separationfunction.

In FIG. 7, including curves 7A, 7B and 7N, there is schematically shownthe speed command signal decoding circuit and its function ofthe presentinvention for a plurality of track circuit locations.

In FIG. 8 there is shown the speed command signal decoding circuitarrangement for inducing the speed command signals into a given trackcircuit block and the circuit arrangement for sensing the vehicleposition-detecting signal.

In FIG. 9 there is shown the centrally located control station apparatusprovided in accordance with the teachings of the present invention.

In FIG. 10 there is shown the reset signal generating circuit for theapparatus of FIGS. 6,7 and 8.

One purpose of the signal multiplexing system of the present inventionis to transmit and receive over a total of four pairs of conductors, ina very reliable manner, all the required train control signals betweensome wayside station location and each of a plurality of remote signalblock locations serving in dividual track circuit transmitters andreceivers, train identifcation receivers, programmed stop transmittersand the like. These signals can include train movement speed commands,train presence signals, identification information signals,synchronization pulses, a crystal controlled frequency standard, andpower. The four pairs of conductors provide respeclive paths in thisregard for information down, information back, control signals and thepowerv The prior art train control signalling system teachings wouldprovide a multiplicity of individual cables from the central location toeach of the remote locations to carry the individual signals; since thedistance involved amounts to several miles this latter approach becomesmuch greater in cost and the cable density at the source becomes aproblem.

For the cost, the signal multiplex concept gives a lot more flexibilityand more ability to control the movement of the train vehicle. Formonitoring the movement of the train vehicle in respectively oppositedirections a duplicate of a hardwired train control system would berequired. The addition of another wayside station location is easierwith a multiplex con trol system or another program stop transmitter. lfextra time slots are available, additional operational functions canreadily be included during a given scanning cycle of the multiplexcontrol unit. ln general, a typical application will utilize only 25 ofthe 32 signal time slots for controlling vehicle movement throughrespective track circuit signal blocks, and the additional six or seventime slot positions would then be available for additional communicationfunctions that may be required. if additional time slot positions areavailable, and not being used for directly controlling the vehiclemovement, these additional time slots can be tied into an additionalpiece of sensing equipment for example positioned along the track forthe purpose of detecting a landslide or some other desired bit ofinformation relative to the operation of the transit system withoutrequiring the running of an additional hardwire circuit from this remoteposition back to the wayside control station. Any information in thisregard can be transmitted, if the bandwidth requirements of thisinformation are low enough, for utilizing the available time slots inthe provided multiplex control system. A rockfall-sensing device or thelike could be an example of this type of information. The neededbandwidth for returning this type of information is very low. A hardwiresystem would require the provision of additional wires includ' ing thecost of installation plus the cost of the wire, and many thousands offeet of distance may be involved for providing this hardwirecommunication. Thusly a substantial large savings of investment and costcan be taken advantage of by utilizing the already available time slotsignal communication positions.

The present signal multiplex control system has as an objective toprovide a fail-safe train control system suitable for the movement ofpassengers and valuable property. There is an integration between themanner in which the coded signals are supplied to the train to controlthe movement of the train and the way in which the signals aremultiplexed back to the wayside control station. The combination of thecomma-free coded signals and the bit by bit phase reversal operationbetween successively transmitted bits of a given train control signalenhances the fail-safe operation, when considered in conjunction withthe operation of the speed and coding apparatus to be sensitive to andmake a comparison between the transmitted signal and the signal which isfed back for a comparison with a transmitted signal, with the operationof the speed encoding unit being controlled in accordance with thissignal comparison operation, such that should a transmitted signal notcompare to a received signal or should a signal not be received at allto indicate the occupancy of a given track circuit block by a trainvehicle or some failure in the signal transmission operation, theapparatus is operative to then provide a reduced speed command to thetrain vehicle or a zero speed command. The multiplex concept allows amore economical application of this signalling system.

The prior art frequency variable type of a signalling system would notbe readily applicable to a signal multiplex concept in accordance withthe present invention. The very early prior art apparatus utilized onlythree speeds zero, middle and fast. This is typically done by a carrierwhich is modulated at 75 cycles/min. or 120 cycles/min; this provides ineffect a modulation of on and off, and no signal at all is zero speed.This can be extended by going to cycles/min, 270 cycles/min, and soforth to give more speed signals. With the number of speeds required fora modern transit system, the prior art approach becomes hopelesslysaturated in terms of the available frequency spectrum, because of thegreat difficulty of separation of signals due to harmonics and lowerfrequencies and the like. For example a 75-cyclc signal has harmonics atISO, 225, 300, 375 and so forth and this makes it extremely difficult toseparate the respectively different frequencies which are utilized.Additionally the harmonics of the AC power system utilized to energizethe signalling system must be separated. The number of frequenciesrequired do not bear a simple synchronous relationship one to the otherand the required different frequencies for the various desired speedcommand signals become difficult to accommodate. With a bit rate of IScycles/sec, the present control apparatus could readily code Icycle/sec, 2 cycles/sec, 3 cycles/sec, 6 cycles/sec, 9 cycles/sec. andl8 cycles/sec. Additionally it is desired to keep the various bandwidthrequirements to the bare minimum. The l8-cycle/sec. bit rate is a lowfrequency signal which does not present very difficult bandwidthproblems.

The train control system requirements are typically that the controlsystem be in command of a given train vehicle with a dropout of no morethan I second. The Q of a narrow bandwidth lilter is so high that itwould take about l0 seconds for the vehicle control to be effected,since a filter having a 1- cycle bandwidth requires about 10 seconds tobuild up to the required signal level and it is not feasible to allowthe train to operate for a period of 10 seconds with no commandcorrelation relative to the control system. It also takes 10 seconds forthe given filter to die down in signal intensity and for this reason thebandwidths of the respective signal filters must be widened such that aQ not much greater than 1 or 2 is provided and this requires frequencydifferences across a substantial frequency spectrum in order to get thedesired 8 or 9 speed command communication channels desired for thetrain vehicle. The primary requirement is to sense track occupancy inaddition to providing desired speed command signals to the train. In theprior art this track occupancy was sensed by lay ing a second controlsystem carrier on top of the speed com mand control system carrier and afirst track circuit had a first carrier filter requirement, the nextadjacent track circuit had a different carrier frequency filterrequirement and 10 or l2 differcnt carriers were required to get thedesired separation between the respective track circuits. ln the presentcontrol system the track occupancy is sensed through a signal feedbackoperation and a signal comparison is made in relation to the transmittedspeed command signal as compared to the feedback-received vehiclepresence signal, and if the two properly compare the system continues totransmit the prescheduled vehicle speed command signals. Thusly thepresent multiplex control system requires only one transmitter insteadof two, and the total required bandwidth of the system has been narrowedthrough the use of the comma-free signal coding system and additionallyan improved capability for a multiplicity of speed command signals up to8 or 9 such signals.

The comma-free speed command codes have advantages for utilization inconjunction with the present signal multiplexing system, whichadvantages are related to the greater reliability of digital signalcommunication systems and the provision of the phase reversal betweensuccessive bits of the 6 bit, commafree speed command word signals, andthe ability to operate a train control system in a fail-safe mannerwithout the requirement for signal synchronization to indicate thetransmission of the respective speed command word signals. The signalmultiplexing concept enables the train control system to be implementedwith a substantially decreased amount of wire between the respectivewayside control stations and the associated track circuit blocks. Theprior art has continuously taught that a signal multiplexing system isnot reliable enough for a fail-safe train control application. Thevehicle occupancy feedback signals of the present invention provide thefail-safe reliability required in the operation ofthe present multiplexsystem. Unless there is fed back for com parison the identical speedcommand signal that has been transmitted to a particular circuit signalblock, the signal comparison operation will not permit the trainvehicles to move into that particular track circuit signal block in thata vehicle occupancy condition is signalled to the train control. It issimilar to a servomechanism theory application, where there is a forwardloop having uncertain and unstable characteristics, and the feedbacksignal comparison monitors the operation of the unknownand unstableforward loop. The multiplex signal transmitter sends a signal downthrough the plurality of track circuit blocks and there are all sorts ofopportunities for a failure of the communication, and by comparing thesignal that is sent with the signal that is received back, it ispossible to get the correct signal back unless the forward loop isoperating properly. This substantially different than prior art systemsusing one set of frequencies for track occupancy detection and anotherset of frequencies for sending speed commands to the train vehicle, andno feedback of the signals transmitted to the train in regard to speedcommand is provided in the prior art. ln the present system, the samespeed command signals are utilized for the purpose of controlling themovement of the train vehicle through the respective track circuitblocks and in addition, for detecting the presence of a train vehiclewithin any of those track circuit blocks. We know what signal is sentand we know what signal should come back, and ifit does not come back,the assumption is made that the track circuit signal block in questionis occupied by a vehicle and therefore a succeeding vehicle should bereduced in speed and if necessary prevented from entering thatparticular track circuit signal block. A signalling circuit failure isconsidered in the same manner as a vehicle occupancy, such that thesucceeding train vehicle is not permitted to enter a track circuitsignal block where a signal failure has occurred in that the presentcontrol system interprets this to be a previous vehicle occupancycondition.

For a rubbentired transit system, it is contemplated that a pair ofparallel vehicle grounding wires can be placed parallel to the vehicletrack, which two parallel grounding wires can be short eircuited by asuitable brush connector carried by the train vehicle in a mannersubstantially similar to the shortcircuiting effect provided by asteel-wheeled train vehicle operating upon electrically conductive steeltrack members. This has substantial advantage over an active signaltransmitter carried by each train vehicle for sending back to a waysidecontrol station a signal which can be sensed and utilized to indicatethe position of that particular train vehicle. The present controlsystem utilizing the time slot position signal multiplex transmissionconcept in conjunction with the comma-free coded speed command signalsprovides an integrated train control system which is reliable and hassubstantial advantage over prior art hardwired train control systemsparticularly for a large transit system application where a substantialnumber such as 2,000 track circuit signal blocks are employed andcommunication with each of these track circuit signal blocks is desired.

The antennas coupled to the vehicle track are provided on each side ofthe individual short-circuiting conductors which define the respectiveends of the individual track circuit signal blocks. Therefore, thesignal frequency is coupled into each of the track circuit signal blocksadjacent to any given antenna. For this reason, it is feasible toprovide signal receivers tuned to the particular frequency and signalphase shift which is in troduced at any given antenna at the location ofthe next adjacent shorbcircuiting conductor on either side of thatparticular antenna.

In FIG. I there is shown a wayside control station to which isdirect-wired to each of a plurality of track circuit signal blockcontrol devices [2, 14, 16, I8, 20, 22 and 24. It should be understoodthat the station 10, can be operative with any suitable desired numberof such control devices. Further it should be noted that thisarrangement requires a direct connecting multiple conductor between thestation 10 and each of the track circuit signal block control devices.The track circuit signal blocks are here defined by low impedanceconductors 25 respectively connected between the train rails 26 and 28at each end of the individual track circuit signal blocks as generallyshown in FIG. I.

In FIG. 2 there is shown one embodiment ofthe signal communicationsystem in accordance with the present invention wherein the waysidecontrol station 10 contains signal communication equipment which iscooperative with each of the control devices l2, l4, l6, I8, 20, 22 and24. Each wayside station generates coded speed command signals for eachof its associated track circuit signal blocks based on informationcoming back from each others track circuit signal block and from thecentral control station. The control device I2 is operative at thelocation of a low impedance conductor 30, the control device [4 isoperative at the location of the low impedance conductor 32, the controldevice 16 is operative at the location of the low impedance conductor34, and so forth, such that a track circuit signal block is definedbetween the respective low impedance conductors 30 and 32 and anothertrack circuit signal block is defined between the low impedanceconductors 32 and 34 and so forth.

In FIG. 3 there is shown a suitable grounded shield 38 which surroundsthe pair of control signal conductors 40, the pair of information downsignal conductors 42, the pair of information back signal conductors 44and the pair of power conductors 46. The multiplexed signal connectionbetween a wayside station and each of the associated control devices 12,14, l6, 18, 20, 22 and 24 as shown in FIG. 2 could comprise a signaltransmission conductor arrangement as shown in FIG. 3.

In FIG. 4 there is generally shown a wayside station multiplexsignal-sending apparatus 50 operative with the control signal conductors40, and the information down signal conductors 42, the infonnation backsignal conductors 44, and a multiplex signal-receiving apparatus 52.This signal-sending apparatus 50 and the signal-receiving apparatus 52would be located at a wayside control station 10, such as shown in F IG.2. The multiplex signal-sending apparatus 50 sends a plurality of codedvehicle speed command signals for each of up to 32 track circuit signalblocks in a time division multiplex arrangement such that for a firsttime division period one bit of the coded vehicle command signal for thefirst track circuit signal block I is sent, and then for the nextsucceeding second time period one bit of the coded vehicle commandsignal for the second track circuit signal block 2 is sent, and so forthuntil the 32nd time period when a synchronizing or reset signal is sentfor coordinating the operation of the signal transmission system. Thespeed signal encoder 51 provides the programmed in advance scheduledtrain vehicle speed command signals for controlling train vehiclemovement in the respective track circuit signal blocks. The speed signalcomparison circuit 53 senses the received feedback train positiondetection signals, to sense train vehicle-occupied track circuit signalblocks, by comparing on a bit by bit basis the speed command signal sentto each particular track circuit signal block with the signal receivedback from the same track circuit signal block; the presence of a trainvehicle short circuits the signal information to prevent the signalblock receiver from returning over the information back line 44 anyfeedback signal information from an occupied track circuit signal block.

The signal comparison device 53, for determination of vehicle occupancypurposes, includes the necessary time delay provided between the initialtransmission of a given speed command signal bit to a track circuitblock and the feedback return of this same speed signal bit within thespeed signal comparison device 53. A typical signal bit delay betweentwo and three bits has been found in actual practice to be required tomatch properly the signals for comparison. In the event the transmittedsignal bit does not compare with the feedback return signal bit, thenthe speed signal comparison device 53 interprets this as a vehicleoccupied track circuit block condition or a failure of the system ineither of which cases it causes the speed signal encoder S! to transmitan appropriate vehicle speed command signal for safe operation of thetrain system. This speed comparison operation in effect controls whatspeed should be sent to each of the track circuit blocks. The use of FMsignals enables what is called an FM capture effect to occur, with theFM receivers inherently picking up the stronger of two received signals.In the prior art AM receiver operations, a 50 db. signal strengthdifference may be required be fore the receiver preferred one signalover the other. In the operation of an FM receiver, only l db. signalstrength dif ference is required and this permits desirable signal discrimination relative to undesired signals from adjacent track circuitblocks which undesired signals might happen to be received by the FMreceiver and which are not desired to pass through the FM receiver anderroneously inform the wayside station control equipment in regard totrack circuit vehicle occupancy and the like.

In FIG. there is generally shown the multiplex control signal that istransmitted over the control line 40, shown in FIG. 4, and which controlsignal includes bits of information occurring at the rate of576-cycles/see, or 576 signal bits per second, upon which there issummed a 3| 1.04-kilocycles/scc. crystal oscillator signal. The timeslot bit signals 22 through 31 are shown out of the total or 32 that istransmitted, with the 32nd bit position being omitted as shown forsystem synchronization and reset purposes, followed by the first andsecond time slot bit signal for the next successive time slot positions.

in H0. 6 there is shown the control signal line 40 and the in formationdown signal line 42 supplying information to the speed commandsignal-decoding portion of a typical track circuit signal block controldevice. The control signal line 40 supplies the signal waveform shown inFIG. 5 to the counter 60, with the counter 60 being operative like ashift register, to receive the successive signal bits. The reset circuit62 is operative during the 32nd bit position to reset the counter 60 ata zero count. The sensor gate 63 comprises in effect an AND circuitselectively connected to be responsive to a selected status of thecounter 60; for example, for the first track circuit block, when thefirst time slot bit signal is received by the counter 60 and a ONE inbinary form is stored by the counter an output signal will be suppliedby the selectively wired sensor gate 63 to enable the sample and holdcircuit 64 for obtaining from the information down signal line 42whatever bit of speed command signal information, either a ONE or aZERO, is being transmitted during the first time slot position for thefirst track circuit signal block. This first signal bit of informationfrom the information down line 42, for example a ONE as shown by curve6E, during the first time slot, as shown by the curve 6A, passes throughthe sample and hold circuit 64 to set the sample and hold flip-flop 66in a corresponding ONE position, as shown by curve 6. With the firstinforma tion bit from the line 42 being a ONE, the waveform 60 shows thememory function of the sample and hold clocked flip-flop 66 to receivethis information bit, when the reset pulse occurs as shown by curve 6C,and to change its state accordingly. The waveform 6A shows the outputsignal from the sensor gate 63, which is selectively wired to beresponsive only to the storage ofa ONE in binary form or 0000] withinthe counter 60. The sensor gate 63 operates in this regard in a mannersimilar to the well-known function of an AND gate, sensing the ONEoutput of the first stage flip-flop and sensing the ZERO output of theflipflops for the other stages. The output signal for time slot l shownas waveform 6A is applied to enable the sample and hold circuit 64,which in function is a clocked flip-flop, such that a sampling of theinformation signal bit carried by the information down line 42, forexample 2 ONE as shown by curve 6E, occurs by operation of the sampleand hold 64 to provide the output as shown in waveform 6B. The resetcircuit 62 provides the output waveform 6C by operation that will beexplained in greater detail in reference to Fifi. l0, and this latteroutput is applied to enable the sample and hold 66 such that the outputwaveform 6!) results. The second sample and hold 66 is provided suchthat the signal change for all track circuit signal blocks will occurtogether and thereby provide a simpler train control operation, which isdue to the reset pulse being the same for all time slot positionsignals.

Since vehicle speed command information is sent to all the waysidelocations for a given multiplex station on the same information downline 42, it is necessary that each track circuit signal block locationreceive its speed command information only during its particular timeslot. As shown in FIG. 7, the appropriate time slot position signal isdetermined by the operation of the respective signal block counters,such as the counters 70, and 90, which sample the speed commandinformation s9gnal bits from the information down line 42, when apredetermined number count of bit pulses have been received by theirrespective counters 60, 70 and 80. The individual speed commandinformation bit signal for each time slot position is stored in theassociated flip-flop sample and hold circuit 72, and correspondingrespective sample and hold circuits for the other time slot positions,until all locations have similarly received their speed commandinformation bit signal. Each reset circuit 74 at the same time sensesthe occurrence of the 32nd signal bit of control line 40 and operates toprovide a reset signal. For the first signal block counter 70, thisreset pulse would reset the counter 70. Each wayside location, asgenerally shown in FIG. 7, performs a similar operation in its ownassigned time slot. The respective track circuit signal blocks receive aspeed command signal bit in accordance with the command signalinformation bit received and stored during the previous time slot signalbit time. Simultaneously the next set of speed command signal bits beginto pass down the information down line 42 to be stored in the firstsample and hold circuits until all locations again modify their trackcircuit block signals as desired. Thus the transmission of one bit ofthe vehicle speed command signal to each of up to 32 track circuitsignal block locations requires one multiplex cycle or word consistingof 32 multiplex bit signals. Since in this example each of the up to 32track circuit block locations receives six bits of information per givenspeed command signal, at a rate of three commands per second, theoverall multiples rate is l8 32 or 576 speed command information bitsper second.

The multiplex system control line 40 provides an absence of a pulse atthe reset time slot, which is the 32nd time slot position. However, apulse is generated during the 32nd time slot for reset purposes by thereset circuit 74 and corresponding other signal block reset circuits.The time slot pulses are provided for each of the other time slotpositions, other than the 32nd position. At time slot one, the enablepulse on line 7] enables the sample and hold 72 to sense either a ONE orZERO signal from the information down line 42. If a ONE signal isprovided the output of sample and hold 72 goes to a ONE as shown bycurve 7A1. In order for the signal shown by the curve 7A] to go to aZERO at time slot one, it requires ZERO information to be coming throughon the information down line 42. The time slot one signal is shown incurve 7A2, and this time slot one signal is applied to the sample andhole 72 over line 71. Curve 7A3 shows a ONE value information pulse isprovided at the time slot one position such that the output of thesample and hold 72 goes high as shown in curve 7A].

As shown in curve 7Bl, the output of the sample and hold 73 remains at alow output condition in that the information line 42 contains a ZEROinformation signal at time slot two, corresponding to the second trackcircuit signal block, and this passes through the NOT circuit 76 tocause the sample and hold 73 to have a ZERO or low output signal at itsoutput connection 77. Thusly, if a pulse is provided on the informationline 42 for a given time slot position, the associated sample and holdis caused to have a high value output whereas if a ZERO pulse conditionoccurs on the information line at a particular time slot position, dueto the provided inversion NOT circuit. the associated sample and holdhas n ZERO or low output signal provided.

A ONE value information signal on the information down line 42 isapplied to the bottom of the sample and hold 72 for the time slot one;and during the time slot position when an enabling pulse is suppliedover the conductor 7] this causes the output of the sample and hold 72to provide a ONE value output signal as shown in curve 7AI. If on theother hand, a ZERO value information signal occurs on the informationdown line 42, concurrent with the time slot one enabling pulse, the NOTcircuit causes the sample and hold to have a low level output signal. Ifthe information down line 42, at the next occurrence of the time slotone enabling pulse, remains at a high value the output of the sample andhold similarly remains at a high value. Thusly, for each successiveoccurrence of the time slot enabling pulse applied by the AND gate 69over the conductor 71 to the sample and hold 72, the signal value on theinformation down line 42 is thereby sampled, and if it is a ONE valuesignal a high level output is provided by the sample and hold 72.However, during the occurrence of a time slot one enabling pulse on theconductor 71 if the information down line 42 at this time has a ZEROvalue signal, the output of the sample and hold through operation of theNOT circuit 79 is changed to provide a low level output signal.

There is a similar circuit provided for each of the respective time slotsignal positions, as generally shown in FIG. 7, with a second time slotoperating circuit being shown and an N position time slot signal circuitbeing shown. If it were desired in accordance with the present teachingsto control the move ment of a train vehicle in 25 track circuit signalblocks associated with a given multiplex station, 25 such circuits wouldbe required. It can be desired to utilize the available time slotpositions 26 through 31 for sensing the occurrence of a landslide orsome other happening which should be sensed for the proper and reliableoperation of the transit system.

The individual signal block command signal bit sensing circuits samplethe information on the information down line 42, at the occurrence ofits particular time slot enabling signal, and hold this informationuntil the occurrence of the next succeeding time slot enabling signal atwhich time the information then present on the information down line 42is again sampled and held until the occurrence of its next similar timeslot enabling signal. Thusly, the information down line signals would bethe same for the three illustrated signal sampling circuits shown inFIG. 7, however, the time slot enabling signal senses for its associatedsignal block the occurrence of only the information signal bit presenton the information down line 42 at the time of its own particular timeslot signal. Thusly as shown in curve 783, for time slot circuitoperative with the second signal block a ZERO information signal ispresent on the information down line 42 for the first illustratedmultiplex time period so the output of the sample and hold 73 remains ata low output condition. The respective signal equipments shown in FIG. 7are wayside located, with each of the signalsensing circuits beingprovided at the location of a particular track circuit signal block. Themultiplex line traveling the length of the associated track circuitsignal blocks operative with a given wayside control station is shown inthe form of control line 40 and information down line 42. At thelocation of each track circuit signal block, one of the informationsignal bit sensing circuits as shown in FIG. 7 is provided. The 7Ncurves are for time slot 3], and the curve 7N] indicates that theprevious time slot signal occurred when the information down line 42 hada ONE signal on it and a ZERO signal has now been provided to cause theoutput of the sample and hold 75 to have a low level value.

The reset 74 does not influence the sample and hold circuit 72 otherthan to reset the counter 70 back to a ZERO count level, however, thereis a succeeding sample and hold circuit as shown in FIG. 6 to which thereset 74 does apply an enable signal. This reset signal causes therespective vehicle command signal information signal bits which aresupplied to the respective track circuits signal blocks associated witha given wayside location control station to all change signal valuestogether. In other words, the signal bit supplied to every one of thetrack circuit signal blocks is changed simultaneously in relation to agiven wayside location control station.

The reason for leaving the pulse out rather than allowing the counter tocount through 32 pulses and then reset is that ifthe reset generatingcircuit should fail a greater reliability of operation is provided inthat there would be a shifting of stored signal information within thecontrol line signal pulse counter due to the counter's ability to count32 pulses and only 3| pulses of time slot information are transmittedfor each speed signal bit. By leaving out the 32nd time slot positionpulse this assures that the reset will occur at the 32nd time slotposition, and further if the reset equipment should fail the counterwill count the provided 31 pulses and will miss the 32nd time slotposition since no pulse is provided and for the first pulse of thesubsequent signal bit transmission the counter will count to 32 and thenreset and if the particular time slot position is the fifth the counterwill for the next cycle count the time slot four information and thentime slot three and so forth which will result in meaninglessinformation that can be sensed. Otherwise, if some equipment failureshould occur there is a likelihood that the counter would sit on sometime slot other than five, providing unauthorized information. This inturn could cause unsafe train control operation.

In reference to FIG. 8, the track vehicle presence is indicated by thefeedback of signals picked up by the receivers associated with therespective track circuit signal blocks to indicate the respectiveunoccupied track circuit signal blocks. If a train vehicle is located ina signal block no signal is fed back. These presence-indicating signalsare multiplexed back to the central control station. The same time slotthat is used for multiplex information down transmission is used forretransmission of feedback signals on the information back line.

A more detailed block diagram of a typical wayside track circuit signalblock control device is shown in FIG. 8. The word and bitsynchronization pulses are obtained from the control line 40. Afterpassing through the high pass filter I00, the 3| l.04-kilohertz signalfrom the control line 40 is put into a divider counter I02 whichprovides out a predetermined one of three pairs of frequencies F-I, F-2or F-3 each to have an output ONE or an output ZERO signal. The ANDgates I04 and I06 operate to determine the selection of a ONE or a ZEROas will be later explained. The divider counter I02 in this regardoperates as a well-known feedback counter to generate a signal inconjunction with the divider 108. For purposes of illustration, for anF-I frequency signal, a ONE will be provided at 5 kHz. and a ZERO willbe provided at 8 kHz.; and a ZERO will be provided at 9 kHz.; for an F-3frequency signal, a ONE will be provided at 7 kHz. and a ZERO will beprovided at l0 kHz. The divider I08 functions in general as awave-shaping circuit.

Assuming the wayside track circuit signal block position for the circuitshown in FIG. 8 is the first time slot one location, such that the speedcommand signal bit supplied to thc clocked flip-flop I10, operative as asample and hold device, is fed in when the flip-flop is enabled by thetime slot one signal from the logic gate 112 operative with the signalcounter 114 in response to the first bit only after reset of the576-cycle control signal supplied by the control line 40. If theparticular information down signal bit at this time had been a ONE, thefollowing pulse will transfer this into sample and hold I I I, therebyenabling AND gate I06 to cause the divider I02 in conjunction with thedivider 108 to supply, for example, the F-I frequency signal ONE at afrequency of 8 kHz. to the AND gate I16. Upon the occurrence of the 32ndbit or reset pulse on the control line 40, the reset circuit 8 willprovide an output signal to reset the counter II, to enable the secondsample and hold III and to trigger the flip-flop I20 to energize theother input of AND gate 1 I6 such that an F-I frequency ONE signal of 8kHz. is supplied through the OR gate 122 and transmitter 124 to energizethe signal transmission antenna I26 operative with the track I28 andhaving the short circuit conductor at the illustrated position relativeto the antenna 126 so that substantially no current at frequency 8 kHz.flows in the conductor 130 thereby. The following reset pulse will causeflip-flop I20 to enable AND gate I32, thereby providing the oppositephase signal from divider I08 to the transmitter.

The reset circuit IIB is operative by applying the control signal, asshown in FIG. to a resonant circuit which will ring through the absentof 32nd bit pulse, and the output from the resonant circuit is thensquared to produce a second continuous signal. When this secondcontinuous signal is compared to the original control signal in an ANDgate, the output will be the IS-cycle/sec. reset pulses. Each resetpulse is used to reset the five bit counter II4 to ZERO at the beginningof each multiplex word, and this counter then begins to count thecontrol signal bit pulses. The AND gate IIZ is connected to respond whenthe counter reaches the predetermined count level corresponding to theassigned time slot. During this time slot, the output of the gate I12,operative with the sample and hold flip-flop IIO samples the vehiclecommand information bit signal on the information down line 42 byenabling the flipflop I10, and this information bit signal is thenstored in the flip-flop IIO for later use. After all the wayside signalblock locations have responded to their respective vehicle commandsignal bits, during their assigned time slots in like manner, the nextreset or 32nd bit pulse comes along. In addition to resetting thecounter 114, for each wayside location, to ZERO, it also transfers thestored bits from the flip-flop M0 to the succeeding sample and holdflip-flop III and then to one of the AND gate I04 or AND gate 106, whichwill determine the ONE signal or ZERO signal frequency of the tracksignal supplied by divider I08 during the next multiplex cycle, andthrough operation of the trigger flip-flop I inverts the phase of thecommand signal bit from the divider I08. In this way all track circuitblocks change their vehicle command signal bits simultaneously, eventhough they receive these signal bits sequentially.

The counter I14 that is used for time slot determination consists offive binary stages. The 32nd bit pulse resets the counter I I4 to zero,after which each successive control signal bit pulse increases the countby one. The AND gate 112 is connected to give an output at a selectedcount level corresponding to the respective assigned time slot inaccordance with the circuit logic chosen for the AND gate I12.

The 31 I.04-kilocycle carrier from the filter I00 is divided down to apredetermined one of the track signalling pairs of frequencies F-l, F-2or F-3 by the feedback divider counter I02 as determined in advance. Thelogic including AND gates I04 and I06 must now select one of twopossible frequencies for the respective ZERO and ONE outputs.

In this manner, one of the two resulting frequencies corresponding toONE or ZERO signals is selected for transmis' sion to the track, andreversed in phase by each reset pulse for synchronization purposes onthe train. This is accomplished by selecting twice the desired frequencyfrom the divider 102 and then dividing by two one more in an additionaldivider 108. The phase of the bits supplied to the track is shifted ateach word transition by the AND gates [I6 and I32 for timing informationto the train by selecting alternate outputs from the flip-flop 120. Inaddition since the signal from the counter I08 does not necessarily havea 50 percent duty cycle, this final division by two assures that this isso.

For the purpose of multiplex encoding, the output of the discriminatorof the vehicle position sensing track receiver I48 consists of either aONE or ZERO for each time slot period, which must be returned to themultiplex center over the information back line 44. The receiver outputfrom the receiver I48 is passed through the AND gate I42 for each enablepulse from the time slot counter II4 and AND gate I12 to read out thesignal information from the track receiver I48 and to send onto theinformation back line 44 this signal information.

The antenna 126 shown in FIG. 8 gives bidirectional running capabilitiesin that it energizes the track circuit blocks on either side of theshort circuit connection I with a particular F-I vehicle speed commandsignal. Any given receiver receives in one direction because of thefrequency of the lilters it has in it to operate with that receiver, andany given signal receiver can show whether its associated track circuitblock is occupied or is not occupied regardless of the movementdirection of the train vehicle which is occupying that track circuitblock.

With a bit rate of 18 bits per second, three vehicle speed commandsignals per second can be sent from a wayside station location controlunit to each of the associated track circuit signal blocks. The 18 bitsper second cycle rate indicates the capacity of the present multiplexsignal system to transmit 18 bits of information for each second, and ifa given speed command signal has 6 bits then three such speed commandsignals can be transmitted to each track circuit block in each second oftime. For one particular train control system where the presentmultiplex apparatus is intended for application, the train controlrequirement was that the wayside control unit could not be out ofcontrol of a given train vehicle for a longer period than I second oftime. When the vehicle is going from one multiplex block of trackcircuits to the next adjacent multiplex block of track circuits, therecan occur a transient loss of one word of speed command signal. Thusly,the transmitted speed command signal frequency rate must be at least twospeed commands per second. However, in accordance with the presentinvention we have three complete speed command signals transmitted persecond, and we could lose two of them. One multiplex territory to thenext multiplex territory would be considered from one group of up to 32track circuit signal blocks associated with a given wayside controlstation to the next group of 32 track circuit signal blocks associatedwith the next adjacent wayside control station. There is the furtherpossibility of losing another word because of noise conditions, sincethere are random noise conditions throughout the entire train system.Thusly, with the present system one or two words of speed command can belost due to noise or moving from one multiplex territory to the nextadjacent multiplex territory and still provide the required one speedcommand to the train in each second of time. This gives a significantimprovement in the reliability of the train control system. Upon losingcontact with the train for over a period of I second, emergency brak'ing is automatically applied in the train vehicle. The emergency brakingcondition of the train is irrevocable after seconds of time and thisallows an occurrence of random noise conditions and the like to now andthen lose contact with the train for over a period of I second of time,and if communication with the train vehicle is lost for I or 2 or 3seconds, the emergency braking condition would be applied; however, oncethe communication was reestablished the control of the vehicle would goout of emergency braking back to normal running condition. Theapplication of emergency breaking condition for l or 2 or 3 secondswould probably not be physically noticed by the passengers carried bythe train; it is questionable if emergency braking applied for l or 2seconds would get through the jerk limit control which is also inoperation relative to stopping the movement of a given train vehicle.Also, the train mass is so enormous that a change of control applicationof 3 or 4-second variation is probably not going to have a substantialnoticeable effect upon the riding comfort of the passengers.

It should be further understood that it is not necessary to use asix-bit comma-free speed command signal, but rather a three-bit signalor a four-bit signal or a 7-bit signal or other bit length coded speedcommand signals can be employed in accordance with the teachings of thepresent invention.

Referring to FIG. 8 the frequency F-I, F-Z or F-3 is preset by thedivider counter I02 which is selected for example for a particular trackcircuit block. The divider counter I02 will he set to some frequencysuch as F-I, having a high and a low frequency in itii frequency pair.The subsequent divider I08 is a simple divide by two divider circuit,such as a single stage flip-flop, to assure an on-off one-to-onc ratioand this squares up to the one-to onc on-ol'f ratio. The second sampleand hold Ill determines the dividing of the 3| 1.04-kilocycle signal,with the second divider 108 squaring it up to a one-to-one onoff ratio.This provides an in phase signal and an out of phase signal from therespective outputs of the divider 108. Each time a reset signal isprovided by the reset circuit 118, the trigger flip-flop 120 selectsalternate AND gate 116 and I32 such that when a given reset pulse comesalong, for example the high output signal is selected and the next resetpulse causes the low output signal to pass through the AND gates, asignal phase reversal occurs each time a reset pulse is provided. Thesephase reversed alternate output signals are applied through theamplifier 124, which can be considered to comprise a signal transmitter,for the energization of the antenna 126. To illustrate the operation ofthis circuitry, assume that an 80-m.p.h. speed signal were to besupplied to the antenna 126 including six bits ofinformation of thearrangement llll1. For the first ONE signal bit, a S-kilocycle signalwould pass from the divider I08 through the AND circuit 116 to thetransmitter amplifier 124 and energize the antenna 126. The reset pulsewould then occur for the next ZERO signal bit, such that an S-kilocyclesignal would pass through the AND gates to the transmitter amplifier I24and energize the antenna 126. The third signal bit of this given speedcommand is a ONE which would again cause a S-kilocycle signal to passthrough the transmitter and amplifier 124 to energize the an tenna 126.The fourth, fifth and sixth signal bits are ONE to provide a group ofS-kilocycle signal bits. Without the provided phase reversals, the trainequipment would have difficulty recognizing the occurrence of therespective signal bits and the complete six-bit speed command signal. Bychanging the phase of the respective bits, this permits the trainequipment to sense the respective signal bits. When going from akilocycle to an B-kilocycle signal, this is readily detected in that afrequency change has occurred; however, for the last four signal bits ofthe 80-m.p.h. speed command signal there is no frequency change, and thephase reversal permits the train carried receiving equipment to sensethe occurrence of the respective signal bits. Between the 101 signalbits the phase reversal is not required, however, it is more simple inthe operation of the flip-flop circuit 120 to reverse phase for eachrespective signal bit whether needed or not, and this simplifies thereceipt of the speed command signal by train-carried equipment.

As shown in FIG. 9, as part of the station equipment there is provided acounter 200 and a multiplicity of sampling AND gates 202, 204, 206 andso forth through 208, and with one AND gate being provided for each timeslot being used. The bit and word pulses are derived from the 311.04kilocycle oscillator 210 in the manner previously described; thus thewayside station multiplexer serving up to 32 remote track circuit blocksrequires one oscillator 210, one 5-bit counter 200, one 9-bit divider212 and a maximum of 64 AND gates are required for interfacing with thecontrol system. The sampling AND gate 202 is connected to theappropriate high or low level outputs of each stage to be operative tosense the count level of one within the counter 200, and provides anoutput signal to the AND gate 203 which is connected to the speedcommand providing information down line 42 from the station, such thatthe first time slot information bit from the speed signal encoder $1 isthereby passed through the AND gate 203 and the subsequent OR gate 197to the information down line 42. When this first time slot informationbit is a ONE, the ONE signal will pass through AND gate 203. When thisfirst time slot information bit is a zero, the AND gate 203 will have nooutput signal so in effect a Zero is supplied through the OR gate 197.The other sampling time slot AND gates and associated AND gates aresimilarly operative for their respective time slot periods. In thismanner the predetermined train vehicle speed patterns are establishedand sent to each signal block location.

When the counter 200 has a 32 count level, corresponding to the 32nd bitposition, the AND gate 220 has been wired in a predetermined manner tosense the stage output signals so as to provide an output signal whichis inverted by the NOT 222 such that AND gate 224 passes the 576-cycleoutput signal from the divider 212 except when the output signalcorresponding to the 32nd time slot is supplied by the AND gate 220. Theanalog summing junction 226 adds the 3! 1.04 kilo cycle signal from theoscillator 210 to the 576cycle signal from the divider 212 and suppliesthe resulting control signal through the amplifier 228 to the controlline 40. Thusly, when the AND gate 220 senses the 32nd time slot, thecontrol line 40 receives no 576-cycle signal through the AND gate 224and the 32nd time slot bit shown in FIG. 5 is thereby provided.

In P16. 10 there is illustrated the operation of the reset circuit 62,such as shown in FIG. 6. In FIG. 10 there is shown the control line 40which carries the control signal shown in waveform 10A. This latterwaveform is supplied to one input of the AND gate 300. The waveform 10Ais also supplied to the tuned circuit 302, where a ringing effect occurswhen the 32nd bit pulse occurs as shown in waveform 10B, and theamplifier 304, which includes a limiter circuit, provides the outputwaveform 10C. It should be noted at the position 306 of the 32nd timeslot signal having a ZERO value in waveform l0A, there occurs areproduced signal bit in waveform 10C. Due to the signal inversion whichoccurs because of signal delay, the AND gate 300 senses similar signalsonly during the 32nd bit signal time slot period to provide an outputreset signal only during the 32nd bit signal of control waveform 10A.

in one particular application of the present signalling control system,some miles of double track rapid transit system is operative including33 wayside stations which control the energization of approximately2,000 track circuit blocks and I40 switches. in a signal block system oftrain control, speed commands for the individual train are communicatedto any train vehicle positioned within a particular signal block throughtrack circuits. The feedback of the speed control signals from the sametrack circuits is used for detecting the presence of a train vehicle ineach block. Coded audiofrequency speed command signals are sent to thetrack signal blocks for this purpose and then received back to indicatetrain vehicle presence.

A signal multiplex system utilizing four pairs of twisted conductorsrather than a larger number of hardwire pairs is employed. The trafficcontrol system receives back signal information in regard to each trackcircuit block occupancy as well as the condition of the providedswitches, and delivers switch position control signals and train vehiclespeed command signals to each train vehicle. A command signal terminalis located at each wayside station which communicates with up to 32track circuit blocks associated with each wayside station. Theindividual track circuit blocks are driven by respective signaltransmitters operative with the end of each circuit block. The trackcircuits operate in the audiofrequency range and the signals are coupledinto the individual track circuit blocks by a simple loop antenna systemgenerally shown in FIG. 8 and placed about a low impedance conductorconnected between the two rails at this location. The latter conductoris provided to simplify and balance the conduction of substantialtraction currents within the rails. Receivers are in ductively coupledto the short circuit conductors by means of small pickup coils orantennas which can if desired in addition be coupled to the rail atintermediate points between the shorting conductors for a secondarytrain control operation. The transmitter loop antenna and the receivercoils are essentially air core transformers. Two-way running capabilityis achieved by extending the transmitter loops to both sides of therespective shorting conductors.

it was decided in the operation of the present system to utilizetransmitted constant voltage signals and current signal de tection, fromthe viewpoint of signal attenuation as a function of distance, which isimplemented by the transmitter loops in the small detection coils andthe short circuit conductors between the rails; this is compared to thevarious combinations of constant voltage signal transmission, constantcurrent signal transmission, track signal voltage sensing and tracksignal current sensing that could otherwise be employed. This permits alonger track circuit signal block with a given degree of assurance thatthe system will operate properly over the full range of valid operationconditions such as dry and wet track conditions.

The transmitter is modulated with frequency shift modulation, whichoffers the considerable advantage that useful information is transmittedall of the time instead of leaving the receiver with no signal half ofthe time, and during which time the receiver would otherwise be highlysusceptible to noise conditions. Frequency shift keying provides asignal which can be noise reduced through limiting.

The frequency shift modulation information signal is carried by aninformation down line which communicates in serial bit form all of thedesired vehicle command signal information to each of the respectivetrack circuit blocks. Each block location has its own assigned time slotwhich is built into the translating equipment. This time slot signalenables the information down line to deliver its information into amemory circuit where it is stored for the duration of the one signal bitcode cycle. The information that is delivered to the memory tells thewayside transmitter to go to either of two frequencies, and in this waythe actual shift of frequency of each track circuit block transmitter iscontrolled from the wayside station and can be coded in its own uniqueway so as to communicate the desired speed signals to the train vehicle.The information down line contains the speed command signal, and thecontrol line contains a predetermined code including synchronizingpulses, which latter signal consists of a train of 3| successive pulsesfollowed by a reset or synchronizing pulse followed by 31 moreinformation pulses and so on. The space between the 31st and the firstpulse is for synchronizing and reset purposes so that the proper time isthereby selected. A time slot select circuit counts these pulses and atits prewired count level delivers a signal to enable the pulse occurringin the speed command information down line through to the memory circuitwhich is then set at either a ONE or a ZERO depending on the informationpulse which occurs on the information down line at the time assigned tothe particular block location. This memory circuit will not change untilthe cycle is repeated during the next 3l pulses, with the signal storedin memory being used to shift the frequency of the local transmitterbetween its two assigned frequencies. In the actual operation of themultiplex system it is desirable to have all transmitters shiftedsimultaneously, so the information in each of the track circuit blockmemory circuits is stored until the reset space between the 31st and thefirst pulse occurs, at which time whatever is stored is respectivelyused to set the frequency of the local transmitter. In this way,although information is delivered to all local transmitters on a serialbasis, all local transmitters are actually modulated in synchronism witheach other.

In reference to the train presence information back signal receivers,these include crystal filters which allow them to only respond to thefrequency of the corresponding crystal controlled transmittersassociated with and located at the opposite end of the respective trackcircuit blocks. When transmitters and receivers are combined at onewayside block location, the same time slot selector that was used forthe transmitters is also used to enable the receiver output to deliverthe information it is receiving to the receiver information back line.The latter information is decoded into a ONE or a ZERO signal dependingon which of the two assigned frequency pairs is being received.

The time slot generator drive enable circuits allow each multiplexsystem to transmit and receive in the assigned time slots. During thereceive operation of the system the information is first delivered to aspeed signal code comparison cir cuit, and if it passes this test, it isthen delivered to a final relay safety protection system of conventionaldesign. This safety protection system, including the speed signalencoder 51, develops speed commands for the vehicles located in thetrack circuit signal block with which it is connected. The speedcommands are delivered to the transmitter information down line throughappropriate time slot enable circuits. The feature which makes thepresent system substantially immune to errors in synchronization is thefeedback and signal comparison taking place between the speed signalcode generator and the speed signal code comparison circuit; if thereceiver operative with a given track circuit signal block doe notreceive exactly, pulse bit by pulse bit, the same signal informationintroduced to this track circuit signal block by its associatedtransmitter, no speed command signal information will be released to thesafety protection circuit. This provides double protection of the trackcircuit block; first, the frequency must be correct in order to bereceived by the crystal filtered receiver and, second, the receiver mustreceive exactly what the associated transmitter transmits before a validsignal condition is recognized.

The safety integrity of the communication system is further enhanced bythe use of comma-free coded speed command signals, which reduce to avanishing point the possibility of etc ternal interference producing arecognizable but erroneous vehicle speed command. The speed signal codeconsists of six bits of information to transmit nine desired speedcommand signals. Only those signals which have the comma-freecharacteristic are utilized. A repetitive sequence of any of these codedcommand speed signals will never be confused with any other coderegardless of the time or random signal bit selected as the beginningofa vehicle command signal message. In this way no synchronization isrequired in the vehicle decoding system in order to recognize a speedcommand signal. The additional bits required for this type of code arean advantage in the track circuits, since the more bits that arecompared at the receiving end with those introduced in the transmittingend before validity is recognized reduces the probability that a falsesignal will not be detected. Six bits of signal information reduces thispossibility as a function of time down to a mathematically insignificantlevel. The comma-free speed command signal now offers a furtheropportunity to protect adjacent track circuits from receiving erroneousinformation over and beyond that which is provided by the frequencyseparation; if all track circuits were being commanded at the samespeed, it otherwise would be only the frequency separation andattenuation that keeps the respective adjacent track circuits separated.This is a situation that exists in prior art conventional audiofrequencytrack circuit operation; however with comma-free coded speed commandsignals, it is possible to phase-shift or delay each successivetransmitter by one pulse of the speed command code without the vehiclerecognizing the difference. This phase shift of one pulse then makes itpossible to get a signal separation between the command signals ofsuccessive track circuit blocks even if each were asking for the samevehicle speed. Three sets of frequency pairs are utilized for therespective track circuit blocks and there are six possible timepositions for each signal frequency for a given speed command. It thenfollows that [8 uniquely identifiable track circuit signals, whenconsideration of the three frequency pairs used and the six phase shiftsobtainable, are thereby possible before it is necessary to repeat anidenti cal speed command signal format. This provides high attenua tionof signals through any given length of train track and the negligibleprobability of occurrence of l8 multiple failures before an unsafeoperating condition might occur.

The train control equipment carried by each train vehicle consists oftwo systems; the first system is for the control of the speed of thevehicle, and the second system is for the control of the vehicle duringstation stopping. The train vehicle carries a speed control antennasystem suitably shielded and coupled to the train rails to receive allthree frequency pairs from the track. The train-carried receiver filtersthis speed control in formation and delivers it to a speed decoderaboard the train. The speed decoder recognizes a comma-free code withoutbenefit of word synchronization and delivers one of up to nine speedcommands to the train These speed commands are interpreted by the speedregulation equipment and compared with a tachometer, with the resultingoutput signal then controlling as desired the propulsion equipment andthe brake equipment. The same speed command signals are delivered to anoverspeed protection equipment carried by the train which also comparesthe speed commands with a tachometer and provides independent overridingcontrol of the brake equip ment in the event that an overspeed conditionexists. The second subsystem carried by the train vehicle is concernedwith station stopping.

The safety system thereby provided is dynamic in operation and demandsthat it continually be checking itself before delivering the vehiclespeed commands to the train propulsion equipment and further utilizesfail-safe comma-free coding to make it substantially impossible forinterference and noise signals to cause unsafe train vehicle operation.

One advantage of using only four twisted pairs of conductors, plus theabove-described interface equipment for a complete system covering manymiles, is the attractiveness from the standpoint of cost and cabledensity as compared to the use of individual hardwired cables to eachremote location. The 3| 1.04-kilocycle frequency standard transmitted toeach track signal block locations allows precise crystal control of alltrack signal block transmitters while requiring only a single crystaloscillator in each of the associated wayside control stations. Theimplementation of the time division multiplexing system and digitalcircuitry allows for greater flexibility, greater reliability, morefail-safe operation and lower cost than can be achieved with prior arttrain control systems.

In general it should be understood that the scope of this invention isnot limited to the above specifically described system. For example, ifdesired, any other suitable frequency could be used in place of the 3|l.04-kilocycle frequency standard, with the 31 1.04-kilocycle frequencybeing chosen to obtain signalling frequencies between S to 10 kc. by aneven integer number of divisions within a divider circuit, and none ofwhich are harmonics of the power supply and other presently usedsignalling frequencies. The number of destinations or track circuitsignal blocks operative with a given wayside controi station could bemodified by factors of two by the addition or deletion of counterstages,and the type of command signal information is not limited to thatdescribed.

While the invention has been described with respect to AF track signalcircuits, it should be recognized that certain ofthc telecontrolmultiplexing features may be utilized with other types of signaltransmission lines. For example, the commafree code control signalscould be multiplexed to remote stations via a radio transmission linkusing the technique of time slot multiplexing with phase shifting of themultiple bits of the multiple bit multiplex word. The remote stationwould in this instance include a means for sensing the status ofoperation which is being controlled, and would provide a local TRUEstate signal when the operation status and the command status match. Thesensed signal would be anded with this TRUE signal and returned to thetelecontrol transmission station for comparison to provide assurance ofproper operation of the telecontrol multiplex. Suitable time bufferingis provided in the coupling channels to effect comparison ofcorresponding parts of the transmitted and returned signals.

An article generally descriptive of a relative train vehicle centralizedtraffic control system was published in Railway Signaling andCommunications magazine for Dec. 1967 at pages 1810 23.

The present invention has been described with a certain degree ofparticularity. However it should be understood that variousmodifications and changes can be made in the arrangement and operationof the individual parts without departing from the scope and spirit ofthis invention.

We claim:

I. In a control system for a vehicle operating along a predeterminedpath with a sequence of linearly extending vehicle movement controlsignal circuits disposed along said path, each signal circuit beingoperative with the vehicle when the latter is traveling along thesection of the path coextensive with the signal circuit, said vehicle inits movement being selectively responsive to any one of a predeterminedset of repetitive binary sequence signals introduced into the signalcircuit which is operative with the vehicle, the combination of,transmitter means for providing a selected one of said predetermined setof repetitive binary sequence signals to each of said signal circuits inaccordance with the respective desired movement conditions for theoperation of said vehicle along the sections of the path coextensivewith those same signal circuits,

receiver means for sensing the repetitive binary sequence signal in eachof said signal circuits,

and signal comparison means operative with said transmitter means andwith said receiver means for comparing the repetitive binary sequencesignal provided to each of said signal circuits with the repetitivebinary sequence signal sensed in that same signal circuit and upon amismatch of said signals operative to modify the movement condition ofsaid vehicle within at least the portion of the path coextensive with anadjacent signal circuit.

2. The control system of claim I, each sequence of said repetitivebinary sequence signal being composed of a predetermined number of bits,

said signal comparison means comparing each bit of the repetitive binarysequence signal provided to each signal circuit with the correspondingbit of the repetitive binary sequence signal sensed in that same signalcircuit.

3. The control system of claim 1, including signal memory meansoperative with each of said signal circuits for storing thelast-received signal bit of said repetitive binary sequence signal fromsaid transmitter means,

with said transmitter means providing a stored signal bit release pulseto said signal memory means for supplying the associated signal circuitwith the stored signal bit upon the occurrence of said stored signal bitrelease pulse.

4. The control system of claim I, with said transmitter means providingmultiplexed binary signal bits over a common signal transmission path tothe respective signal circuits such that the signal bits of each saidselected one of said repetitive binary sequence signals are assigned aparticular time period associated with the corresponding signal circuit,

said transmitter means further providing a different time periodselected pulse for each signal circuit such that the repetitive binarysequence signal bit provided for each signal circuit is selected forapplication to that signal circuit during the occurrence of said timeperiod selection pulse associated with that same signal circuit.

5. The control system of claim 4, with said receiver means beingcooperative with said time period selection pulses such that the signalsensed in each of said signal circuits is selected for application tosaid signal comparison means during the occurrence of the time periodselection pulse associated with that signal circuit.

6. The control system ofclaim 2,

said predetermined set of repetitive binary sequence signals being ofthe comma-free code type.

7. The control system of claim I,

said signal comparison means being responsive to a mismatch between therepetitive binary sequence signal provided to a signal circuit and therepetitive binary sequence signal sensed in that same signal circuit toselect for application to at least an adjacent signal circuit arepetitive binary sequence signal representing a reduced speed ofmovement condition,

said signal comparison means including time buffering means to provide apredetermined delay between the time a signal is selected forapplication to a given signal circuit and the time it is compared withthe signal sensed in said given signal circuit.

9. The method of controlling the operation of a vehicle along apredetermined path with a sequence of linearly extending vehiclemovement control signal circuits disposed along said path, each movementcontrol circuit being operative with the vehicle when the latter istraveling along the section of the path coextensive with that samecontrol circuit, said vehicle in its movement being selectivelyresponsive to any one of a predetermined set of repetitive binarysequence signals introduced into the signal circuit which is operativewith the vehicle; including the steps of sending a selected one of saidpredetermined set of repetitive binary sequence signals to each of saidsignal circuits for controlling the operation of said vehicle inaccordance with the respective desired movement conditions for theoperation of said vehicle along the sections of the path coextensivewith those same signal circuits,

sensing and returning from each oi" said signal circuits the repetitivebinary sequence signal in those same circuits,

and comparing the repetitive binary sequence signal sent to each of saidsignal circuits with the repetitive binary sequence signal returned fromthat same signal circuit and when said repetitive sequence signals sentto and sensed in a signal circuit do not match, selecting a repetitivebinary sequence signal representing a reduced speed of movementcondition for sending to at least an adjacent signal circuit.

10. The method of claim 9, including providing a differentcharacteristic to the vehicle control signal sent to each of said signalblocks relative to the control signal characteristics for the adjacentsignal blocks,

and sensing said control signal characteristic for each signal block inrelation to the comparison of the control signal sent to that samesignal block with the vehicle presenceindicating signal returned fromthat same signal block.

11. The method of claim 9, including coding said vehicle control signalto comprise a plurality of ONE and ZERO digital bits suitable forcomma-free signal control of said vehicle in one of a selected number ofvehicle operation conditions within each of said signal blocks.

12. The method of claim 11, with said coding being such that a ZEROdigital bit is a higher frequency signal than is a ONE digital bit,

with the assignment of a predetermined vehicle operating conditionsbeing related to the greater portion of ONE digital bits.

13. The method of claim 9, including coding said vehicle control signalto comprise a multiple bit comma-free signal for the control of saidvehicle within each of said signal blocks,

phase-shifting the multiple bits of the control signal sent to eachsignal block relative to the control signals sent to the adjacent signalblocks M. The method oi'claim 9, including coding said vehicle controlsignal for each one of said signal blocks to control the respectivespeeds of the vehicle when operating within said signal blocks,

and sending a reduced speed vehicle control signal to a given signalblock when it is determined that another vehicle is present within thelast said signal block.

The method ofclaim 9, with said predetermined set of repetitive binarysequence signals being of the comma-free code type.

16. In a train presence detection system for a railway vehicle operatingalong a track divided into a plurality of track circuit blocks, thecombination of transmitter means for providing a predetermined multiplebit digital signal over a single path to each of said track circuitblocks, a given bit of said predetermined multiple bit digital signalbeing provided to each of said track circuit blocks at the same time,

receiver means for sensing any multiple bit digital signals in each ofsaid track circuit blocks, said signal receiver means being operativewith said vehicle such that the presence ol said vehicle in a giventrack circuit block will prevent the receiver means from sensing thepredetermined multiple bit digital signal transmitted to said giventrack circuit block,

and signal comparison means operative with said transmitter means andsaid receiver means for comparing the multiple bit digital signal sentto said given track circuit block with the multiple bit digital signalsensed within said given track circuit block for determining thepresence of said vehicle within said given track circuit block.

17. The train presence detection system of claim 16, the predeterminedmultiple bit digital signal sent to each of said track circuit blocksbeing a repetitive binary sequence signal composed ofa predeterminednumber of bits,

said signal comparison means comparing each bit of the repetitive binarysequence signal provided to said given circuit block with thecorresponding bit of the repetitive binary sequence signal sensed insaid given track circuit block.

[8. The train presence detection system of claim 16,

said signal comparison means being operative to determine presence of avehicle through cooperation of said transmitter means and said receivermeans such that the multiple bit digital signal is not present in atrack circuit block when the block is occupied due to theshort-circuiting effect of said vehicle between the tracks.

19. The train presence detection system of claim 17 includmg signalmemory means operative with each of said track circuit blocks forstoring the signal bit of said repetitive binary sequence signal lastreceived from said transmitter means, with said transmitter meansproviding a stored signal bit release pulse to said signal memory meansfor supplying the associated track circuit signal block with the storedsignal bit upon occurrence of said stored signal bit release pulse. 20.The train presence detection system of claim 17 said transmitter meansproviding multiplexed signal hits over a common signal transmission pathto the respective track circuit blocks such that the signal bits of therepetitive binary sequence signal to be provided to said given trackcircuit block are assigned a particular time period associated with thatsame track circuit block, said transmitter means further providing adifferent time period selection pulse for each track circuit block suchthat the binary sequence signal bit provided for said given trackcircuit block is selected for application to said given track circuitblock during the occurrence of the time period selection pulseassociated with said given track circuit signal block. 21. The trainpresence detection system of claim 20, with said receiver means beingcooperative with the time period selection pulses such that the signalsensed in said given track circuit block is supplied to said signalcomparison means during the occurrence of the time period selectionpulse associated with said given track circuit block. 22. The timepresence detection system of claim 21,

said signal comparison means including time buffering means to provide apredetermined delay between the time a signal is selected forapplication to said given track circuit block and the time it iscompared with the signal sensed in said given track circuit block.

23. The time presence detection system of claim 16, with signal meansfor providing a different characteristic to the multiple bit digitalsignal sent to said given track circuit block relative to said multiplebit digital signals sent to at least the next adjacent track circuitblocks,

said receiver means in sensing the signal in each track circuit blockbeing selectively responsive to the different characteristic associatedwith the respective blocks.

24 The time presence detection system of claim 17,

said predetermined set of repetitive binary sequence signals being ofthe comma-free code type.

1. In a control system for a vehicle operating along a predetermined path with a sequence of linearly extending vehicle movement control signal circuits disposed along said path, each signal circuit being operative with the vehicle when the latter is traveling along the section of the path coextensive with the signal circuit, said vehicle in its movement being selectively responsive to any one of a predetermined set of repetitive binary sequence signals introduced into the signal circuit which is operative with the vehicle, the combination of, transmitter means for providing a selected one of said predetermined set of repetitive binary sequence signals to each of said signal circuits in accordance with the respective desired movement conditions for the operation of said vehicle along the sections of the path coextensive with those same signal circuits, receiver means for sensing the repetitive binary sequence signal in each of said signal circuits, and signal comparison means operative with said transmitter means and with said receiver means for comparing the repetitive binary sequence signal provided to each of said signal circuits with the repetitive binary sequence signal sensed in that same signal circuit and upon a mismatch of said signals operative to modify the movement condition of said vehicle within at least the portion of the path coextensive with an adjacent signal circuit.
 2. The control system of claim 1, each sequence of said repetitive binary sequence signal being composed of a predetermined number of bits, said signal comparison means comparing each bit of the repetitive binary sequence signal provided to each signal circuit with the corresponding bit of the repetitive binary sequence signal sensed in that same signal circuit.
 3. The control system of claim 1, including signal memory means operative with each of said signal circuits for storing the last-received signal bit of said repetitive binary sequence signal from said transmitter means, with said transmitter means providing a stored signal bit release pulse to said signal memory means for supplying the associated signal circuit with the stored signal bit upon the occurrence of said stored signal bit release pulse.
 4. The control system of claim 1, with said transmitter means providing multiplexed binary signal bits over a common signal transmission path to the respective signal circuits such that the signal bits of each said selected one of said repetitive binary sequence signals are assigned a particular time period associated with the corresponding signal circuit, said transmitter means further providing a different time period selected pulse for each signal circuit such that the repetitive binary sequence signal bit provided for each signal circuit is selected for application to that signal circuit during the occurrence of said time period selection pulse associated with that same signal circuit.
 5. The control system of claim 4, with said receiver means being cooperative with said time period selection pulses such that the signal sensed in each of said signal circuits is selected for application to said signal comparison means during the occurrence of the time period selection pulse associated with that signal circuit.
 6. The control system of claiM 2, said predetermined set of repetitive binary sequence signals being of the comma-free code type.
 7. The control system of claim 1, said signal comparison means being responsive to a mismatch between the repetitive binary sequence signal provided to a signal circuit and the repetitive binary sequence signal sensed in that same signal circuit to select for application to at least an adjacent signal circuit a repetitive binary sequence signal representing a reduced speed of movement condition, said signal comparison means including time buffering means to provide a predetermined delay between the time a signal is selected for application to a given signal circuit and the time it is compared with the signal sensed in said given signal circuit.
 9. The method of controlling the operation of a vehicle along a predetermined path with a sequence of linearly extending vehicle movement control signal circuits disposed along said path, each movement control circuit being operative with the vehicle when the latter is traveling along the section of the path coextensive with that same control circuit, said vehicle in its movement being selectively responsive to any one of a predetermined set of repetitive binary sequence signals introduced into the signal circuit which is operative with the vehicle; including the steps of sending a selected one of said predetermined set of repetitive binary sequence signals to each of said signal circuits for controlling the operation of said vehicle in accordance with the respective desired movement conditions for the operation of said vehicle along the sections of the path coextensive with those same signal circuits, sensing and returning from each of said signal circuits the repetitive binary sequence signal in those same circuits, and comparing the repetitive binary sequence signal sent to each of said signal circuits with the repetitive binary sequence signal returned from that same signal circuit and when said repetitive sequence signals sent to and sensed in a signal circuit do not match, selecting a repetitive binary sequence signal representing a reduced speed of movement condition for sending to at least an adjacent signal circuit.
 10. The method of claim 9, including providing a different characteristic to the vehicle control signal sent to each of said signal blocks relative to the control signal characteristics for the adjacent signal blocks, and sensing said control signal characteristic for each signal block in relation to the comparison of the control signal sent to that same signal block with the vehicle presence-indicating signal returned from that same signal block.
 11. The method of claim 9, including coding said vehicle control signal to comprise a plurality of ONE and ZERO digital bits suitable for comma-free signal control of said vehicle in one of a selected number of vehicle operation conditions within each of said signal blocks.
 12. The method of claim 11, with said coding being such that a ZERO digital bit is a higher frequency signal than is a ONE digital bit, with the assignment of a predetermined vehicle operating conditions being related to the greater portion of ONE digital bits.
 13. The method of claim 9, including coding said vehicle control signal to comprise a multiple bit comma-free signal for the control of said vehicle within each of said signal blocks, phase-shifting the multiple bits of the control signal sent to each signal block relative to the control signals sent to the adjacent signal blocks.
 14. The method of claim 9, including coding said vehicle control signal for each one of said signal blocks to control the respective speeds of the vehicle when operating within said signal blocks, and sending a reduced speed vehicle control signal to a given signal block when it is determined that another vehicle is present within the last said signal block.
 15. The method of claim 9, with said predetermined set of repetiTive binary sequence signals being of the comma-free code type.
 16. In a train presence detection system for a railway vehicle operating along a track divided into a plurality of track circuit blocks, the combination of transmitter means for providing a predetermined multiple bit digital signal over a single path to each of said track circuit blocks, a given bit of said predetermined multiple bit digital signal being provided to each of said track circuit blocks at the same time, receiver means for sensing any multiple bit digital signals in each of said track circuit blocks, said signal receiver means being operative with said vehicle such that the presence of said vehicle in a given track circuit block will prevent the receiver means from sensing the predetermined multiple bit digital signal transmitted to said given track circuit block, and signal comparison means operative with said transmitter means and said receiver means for comparing the multiple bit digital signal sent to said given track circuit block with the multiple bit digital signal sensed within said given track circuit block for determining the presence of said vehicle within said given track circuit block.
 17. The train presence detection system of claim 16, the predetermined multiple bit digital signal sent to each of said track circuit blocks being a repetitive binary sequence signal composed of a predetermined number of bits, said signal comparison means comparing each bit of the repetitive binary sequence signal provided to said given circuit block with the corresponding bit of the repetitive binary sequence signal sensed in said given track circuit block.
 18. The train presence detection system of claim 16, said signal comparison means being operative to determine presence of a vehicle through cooperation of said transmitter means and said receiver means such that the multiple bit digital signal is not present in a track circuit block when the block is occupied due to the short-circuiting effect of said vehicle between the tracks.
 19. The train presence detection system of claim 17 including signal memory means operative with each of said track circuit blocks for storing the signal bit of said repetitive binary sequence signal last received from said transmitter means, with said transmitter means providing a stored signal bit release pulse to said signal memory means for supplying the associated track circuit signal block with the stored signal bit upon occurrence of said stored signal bit release pulse.
 20. The train presence detection system of claim 17 said transmitter means providing multiplexed signal bits over a common signal transmission path to the respective track circuit blocks such that the signal bits of the repetitive binary sequence signal to be provided to said given track circuit block are assigned a particular time period associated with that same track circuit block, said transmitter means further providing a different time period selection pulse for each track circuit block such that the binary sequence signal bit provided for said given track circuit block is selected for application to said given track circuit block during the occurrence of the time period selection pulse associated with said given track circuit signal block.
 21. The train presence detection system of claim 20, with said receiver means being cooperative with the time period selection pulses such that the signal sensed in said given track circuit block is supplied to said signal comparison means during the occurrence of the time period selection pulse associated with said given track circuit block.
 22. The time presence detection system of claim 21, said signal comparison means including time buffering means to provide a predetermined delay between the time a signal is selected for application to said given track circuit block and the time it is compared with the signal sensed in said given track circuit block.
 23. The time presence detectIon system of claim 16, with signal means for providing a different characteristic to the multiple bit digital signal sent to said given track circuit block relative to said multiple bit digital signals sent to at least the next adjacent track circuit blocks, said receiver means in sensing the signal in each track circuit block being selectively responsive to the different characteristic associated with the respective blocks.
 24. The time presence detection system of claim 17, said predetermined set of repetitive binary sequence signals being of the comma-free code type. 